1. Field of the Invention
The present invention relates to improvements in a method and apparatus for surface-grinding of a workpiece or workpieces, for example, ceramic wafers, quartz wafers, semiconductor wafers and the like (hereinafter also referred simply to as wafers).
2. Description of the Prior Art
A conventional processing method used for a workpiece or workpieces, for example wafers, comprises, as shown in FIG. 6:
a slicing step A, in which a cylindrical semiconductor ingot or cylindrical semiconductor ingots are cut (or sliced) into wafers, each in the shape of a thin plate, by a wire saw, a circular inner peripheral blade or the like; PA1 a chamfering step B, in which the peripheral edge portions of each sliced wafer are removed in order to prevent chipping along the periphery; PA1 a lapping step C, in which both sides of each chamfered wafer are lapped for correcting the thickness and flatness; PA1 an etching step D, in which the whole surface of each lapped wafer is etched by dipping it into an etching solution in order to eliminate the work damage; and PA1 a polishing step E, in which each etched wafer is mirror-polished across one side or the two sides to improve the surface roughness and flatness. PA1 SW denotes a sliced wafer just after completion of the slicing step, PA1 LW denotes a lapped wafer just after completion of the lapping step, PA1 EW denotes an etched wafer just after completion of the etching step, and PA1 PW denotes a polished wafer just after completion of the polishing step. PA1 a processing method shown in FIG. 7 (a slicing step A--a surface-grinding step H--a chamfering step B--a polishing step E.) or PA1 another processing method shown in FIG. 8 (a slicing step A--a chamfering step B--a lapping step C--an etching step D--a surface-grinding step H--a chamfering step B2--a polishing step E). PA1 (a) a step, in which a wafer SW just after completion of a slicing step (FIG. 10(a)) is fixed by chucking to a vacuum-chuck means 12 by the lower surface (FIG. 10(b)); PA1 (b) a step, in which the upper surface of the fixed wafer SW is surface-ground (FIG. 10(c)); PA1 (c) a step, in which the wafer, the upper surface of which has been surface-ground, is released from the vacuum-chuck means 12 (the waviness and bow of a wafer HW1, the upper surface of which has been surface-ground, remains uncorrected as they were) (FIG. 10(d)); PA1 (d) a step, in which the wafer HW1, the upper surface of which has been surface-ground, is turned upside down (FIG. 10(e)); PA1 (e) a step, in which the turned wafer HW1 is fixed by chucking to the vacuum-chuck means 12 by the upper surface (FIG. 10(f)); PA1 (f) a step, in which the lower surface of the fixed wafer HW1 is surface-ground (FIG. 10(g)); PA1 (g) a step, in which the wafer HW2, both surfaces of which have been surface-ground, is released from the vacuum-chuck 12 (the waviness and bow of the wafer HW2, both surfaces of which have been surface-ground, remains uncorrected as they were.) (FIG. 10(h)). PA1 (a) a step, in which a workpiece or workpieces are fixed at one surface thereof to the upper surface of a base plate by the aid of adhesive material; PA1 (b) a step, in which the base plate is fixed for supporting by the lower surface of itself on a fixedly supporting means; PA1 (c) a step, in which the other surface of each of the workpieces fixedly supported is surface-ground; PA1 (d) a step, in which the base plate and the workpiece or workpieces, the other surface of each of which has been surface-ground, are released from the fixedly supporting means; PA1 (e) a step, in which the workpiece or workpieces, the other surface of each of which has been surface-ground, are separated from the base plate; PA1 (f) a step, in which the workpiece or workpieces, the other surface of each of which has been surface-ground, is turned upside down; PA1 (g) a step, in which the workpiece or workpieces are fixedly by the other surface of each, which has been surface-ground, on the fixedly supporting means; PA1 (h) a step, in which the one surface of each workpiece, by which it was first fixedly supported, is surface-ground; and PA1 (i) a step, in which the workpiece or workpieces, both surfaces of each of which have been surface-ground, are released from the fixedly supporting means. PA1 a slicing step, in which a raw material ingot or raw material ingots are cut into workpieces; PA1 a surface-grinding step, in which each sliced workpiece is surface-ground; PA1 a chamfering step, in which each surface-ground workpiece is chamfered; PA1 a polishing step, in which each chamfered workpiece is polished. PA1 a storage tank, in the interior of which molten adhesive material is stored; PA1 a pressure means, by which a internal pressure is given to the storage tank; PA1 a pipe means, through which the molten adhesive material is transported under pressure from the storage tank; PA1 a pair of an upper heating means and a lower heating means, both of which face each other.
The cross-sectional views of wafers processed in the conventional method shown in FIG. 6 are shown, in sequence of the processing steps, in FIG. 9(a) to FIG. 9(d).
In the figure,
The surface irregularity and curvatures of wafers in FIG. 9(a) through FIG. 9(d) are respectively the waviness and bows drawn in their stressed forms.
The wafer SW just after completion of the slicing step has a form including waviness and bow. This occurs by the reason that a cutting edge does not necessarily advance in a straight line due to delicate imbalance of cutting resistances on either side of the cutting edge.
The contour of a relatively large cycle like those of a bowl or an S character is called Bow and that of repeated irregularity with a small cycle on the order of several mm is called Waviness.
When a wire saw or a circular inner peripheral blade is used, waviness and bow occurs in both cases. But waviness is easier to occur and becomes a problem especially when a wire saw is used. A wafer just after slicing has a chance to have bow due to work damage. At this time it is necessary to slightly etch the wafer surface.
In the current general wafer processing method as shown in FIG. 6, the lapping step C has a function to improve waviness but it has been difficult to correct bow because of easy elastic deformation of a wafer (FIG. 9(a) to FIG. 9(d)).
As the integration levels of semiconductor devices have recently risen, the semiconductor wafers as substrates have had the demand for a higher flatness level.
In order to obtain a wafer or wafers each with a high precision form of this higher flatness level, it is necessary to put surface-grinding into the process.
When this surface-grinding is desired, the following methods may be used, which are:
Here the surface-grinding step H is the one in which a publicly known surface-grinding apparatus 20 as shown in FIG. 12 is used.
In FIG. 12, 22 denotes a grinding stone, 24 denotes a fixedly supporting means and W denotes a workpiece such as a wafer.
In the processing method shown in FIG. 7, the lapping step is omitted and the method is better in terms of processing due to the simplification in processing steps.
If surface-grinding is conducted, however, with a surface-grinding apparatus adopting a conventional way for fixedly supporting a wafer or wafers (for example, the way in which the wafer or wafers are vacuum-sucked onto a rigid chuck table like a porous ceramic plate or the like), there was a problem that waviness and bow of each wafer are almost never improved due to elastic deformation during suction.
A conventional surface-grinding technique applied to the processing method of FIG. 7 comprises, for example as shown in FIG. 10(a) to FIG. 10(i):
In FIG. 10(a) to FIG. 10(i), HW1 denotes a wafer, one of the surfaces of which is surface-ground and HW2 denotes a wafer, both surfaces of which are surface-ground.
Thereafter, the wafer, both surfaces of which have been surface-ground, is polished, but the waviness and bow remain on this polished wafer PW, as shown in a view (FIG. 10(i)).
In this manner, if the conventional surface-grinding technique is simply introduced, waviness and bow of a wafer or each of wafers remain even after polishing and the quality of the wafer or wafers is greatly deteriorated.
Therefore, the method shown in FIG. 7 and FIG. 10(a) to FIG. 10(i) was not put to practical use.
A wafer processing method as shown in FIG. 8 has been proposed in addition to that of FIG. 7 and FIG. 10(a) to FIG. 10(i), as a processing method including a surface-grinding technique, as described above.
The processing method of FIG. 8 is a modification of the conventional method of FIG. 6, which includes additionally a surface-grinding step H and a second chamfering step B2 after the etching step D.
The case in which a conventional surface-grinding technique is applied to the processing method of FIG. 8 is shown in FIG. 11(a) to FIG. 11(g).
In FIG. 11(a) to FIG. 11(g), the same marks as those in FIG. 10(a) to FIG. 10(i) are denoted the same members as those in FIG. 10(a) to FIG. 10(i).
The method shown in these FIG. 8 and FIG. 11(a) to FIG. 11(g) had an advantage that waviness was eliminated from a wafer, but had disadvantages that the number of the steps increased and thereby manufacturing cost was raised.
Therefore, the current surface-processing step is usually conducted by a lapping treatment and a surface-grinding technique using a surface-grinding machine and has difficulty in being introduced into an actual wafer manufacturing process, despite of the advantage of being able to process a wafer or wafers each with less dispersion of thickness.
On the other hand, by means of the lapping step used in the processing methods of FIGS. 6 and 8, waviness is improved as shown in FIG. 9(a) to FIG. 9(d) and FIG. 11(a) to FIG. 11(g), but improvement of bow is not expected very much and thus no effective elimination method of bow was available in the past.